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ICS1493A-19
CLOCK GENERATOR FOR AUTOMOTIVE APPLICATION
Description
The ICS1493A-19 is a low cost frequency generator used for automotive application. Using patented Phase-Locked-Loop (PLL) techniques, the device uses a 19.35 MHz fundamental crystal source to produce seven clock outputs and one reference clock output. The output clocks are at 12.288 MHz, 14.7456 MHz, 22.5792 MHz, 48 MHz, 66.60 MHz, and 33.30 MHz with a 19.35 MHz reference clock output. The 66.60 MHz and 33.30 MHz clocks have a spread select option. Operating voltage of the ICS1493A-19 is 3.3 V. ICS makes many frequency generators. Contact us for all of your clocking needs.
Features
* * * * *
Packaged in 28-pin TSSOP (4.4mm body) Low power CMOS technology Input crystal frequency of 19.35 MHz 3.3 V operating voltage Seven output clocks: 12.288 /33.30 MHz, 14.7456 MHz, 22.5792 MHz, 48 MHz, 66.60 MHz (3 copies)
* One reference clock output at 19.35 MHz * Spread select option on the 66.60 MHz clock (3
copies) and 33.30 MHz clock outputs
* Output enable pin stops clocks low (tri-state with
weak pull-down resistors)
* Zero ppm synthesis error for 48 MHz, 19.35 MHz
clocks; 0.5 ppm error for 12.288 MHz, 14.7456 MHz, 22.5792 MHz clocks; 1 ppm error for 66.60 MHz and 33.30 MHz clocks.
* Industrial temperature range (-40C to +85C)
Block Diagram
VDD 8 PLLA with Spread Spectrum 3 66.60M
SSEN
PLLB
12.288M/ 33.30M 14.7456M
PLLC
48M
X1 19.35 MHz Crystal Crystal Oscillator X2 External tuning capacitors required
PLLD
22.5792M 19.35M
7 GND FSEL OE
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Integrated Device Technology, Inc.
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ICS1493A-19 CLOCK GENERATOR FOR AUTOMOTIVE APPLICATION
Pin Assignment
X1 GNDX CLK19 GND14&19 VDD14&19 CLK14 VDD48 GND48 CLK48 VDD22 GND22 CLK22 VDD66 CLK66 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 X2 VDDX FSEL OE SSEN VDDPLL GNDPLL CLK66 VDD66 CLK33 VDD33 GND33 GND66 CLK66
Spread Enable Table 1
SSEN
0 1
66.60/33.30 MHz Clock
No spread (default) -1.0%
Output Enable Function Table 2
OE
0 1
Output Status
Stopped low Running (default)
Frequency Select Table 3
FSEL
0 1
Clock Selected (MHz)
12.288 33.30 (default)
28-pin (173 mil) TSSOP
Pin Descriptions
Pin Number
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
Pin Name
X1 GNDX CLK19 GND14&19 VDD14&19 CLK14 VDD48 GND48 CLK48 VDD22 GND22 CLK22 VDD66 CLK66 CLK66
Pin Type
Input Power Output Power Power Output Power Power Output Power Power Output Power Output Output
Pin Description
Crystal connection. Connect to a 19.35 MHz fundamental crystal. Crystal oscillator circuit ground. 19.35 MHz reference clock output. Internal weak pull-down resistor. Connect to 14.7456 MHz and 19.35 MHz clock output ground. Output driver power for 14.7456 MHz clock output. 14.7456 MHz clock output. Internal weak pull-down resistor. Output driver power for 48 MHz clock output. Connect to 48 MHz clock output ground. 48 MHz clock output. Internal weak pull-down resistor. Output driver power for 22.5792 MHz clock output. Connect to 22.5792 MHz clock output circuit ground. 22.5792 MHz clock output. Internal weak pull-down resistor. Output driver power for 66.60 MHz clock output. 66.60 MHz clock output. Internal weak pull-down resistor. 66.60 MHz clock output. Internal weak pull-down resistor.
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ICS1493A-19 CLOCK GENERATOR FOR AUTOMOTIVE APPLICATION
Pin Number
16 17 18 19 20 21 22 23 24 25 26 27 28
Pin Name
GND66 GND33 VDD33 CLK33 /12.288 VDD66 CLK66 GNDPLL VDDPLL SSEN OE FSEL VDDX X2
Pin Type
Power Power Power Output Power Output Power Power Input Input Input Power Input
Pin Description
Connect to 66.60 MHz clock output circuit ground. Connect to 33.30 MHz clock output circuit ground. Output driver power for 33.30 MHz clock output. 33.30 /12.288 MHz clock output. Internal weak pull-down resistor. Output driver power for 66.60 MHz clock output. 66.60 MHz clock output. Internal weak pull-down resistor. Connect to PLL circuit ground. VDD for PLL circuits Connect to 3.3 V. Spread enable pin for 66.60 MHz clock. See table 1 above. Internal pull-down resistor. Enables output when =1 and disables (pulled low) when =0. See table above 2. Internal pull-up resistor. Frequency select pin, internal pull-up. See Table 3. VDD for crystal oscillator circuit. Connect to 3.3.V. Crystal connection. Connect to a 19.35 MHz fundamental crystal.
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I n t e gra te d D ev i ce Technology, Inc.
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ICS1493A-19 CLOCK GENERATOR FOR AUTOMOTIVE APPLICATION
External Components
Decoupling Capacitor
As with any high-performance mixed-signal IC, the ICS1493A-19 must be isolated from system power supply noise to perform optimally. A decoupling capacitor of 0.01F must be connected between each VDD and the PCB ground plane.
PCB Layout Recommendations
Observe the following guidelines for optimum device performance and lowest output phase noise: 1) The 0.01F decoupling capacitors should be mounted on the component side of the board as close to the VDD pins as possible. No vias should be used between the decoupling capacitors and VDD pins. The PCB trace to VDD pin should be kept as short as possible, as should the PCB trace to the ground via. 2) The external crystal should be mounted just next to the device with short traces. The X1 and X2 traces should not be routed next to each other with minimum spaces. Instead, they should be separated and away from other traces. 3) Place the 33 series termination resistor (if needed) close to the clock output to minimize EMI. 4) An optimum layout is one with all components on the same side of the board, minimizing vias through other signal layers. Other signal traces should be routed away from the ICS1493A-19. This includes signal traces just underneath the device, or on layers adjacent to the ground plane layer used by the device.
Series Termination Resistor
Clock output traces should use series termination. To series terminate a 50 trace (a commonly used trace impedance), place a 33 resistor in series with the clock line, as close to the clock output pin as possible. The nominal impedance of the clock output is 20 .
Crystal Load Capacitors
The device crystal connections should include pads for capacitors from X1 to ground and from X2 to ground. These capacitors are used to adjust the stray capacitance of the board to match the nominally required crystal load capacitance. The value (in pF) of these crystal caps should equal (CL - 6 pF)*2. In this equation, CL= crystal load capacitance in pF. Example: For a crystal with a 16 pF load capacitance, each crystal capacitor would be 20 pF [(16-6) x 2 = 20 pF].
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ICS1493A-19 CLOCK GENERATOR FOR AUTOMOTIVE APPLICATION
Absolute Maximum Ratings
Stresses above the ratings listed below can cause permanent damage to the ICS1493A-19. These ratings, which are standard values for IDT commercially rated parts, are stress ratings only. Functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can affect product reliability. Electrical parameters are guaranteed only over the recommended operating temperature range.
Item
Supply Voltage, VDD All Inputs and Outputs Ambient Operating Temperature Storage Temperature Junction Temperature Soldering Temperature -0.5 V to 7 V
Rating
-0.5 V to VDD+0.5 V -40 to +85 C -65 to +150 C 125 C 260 C
Recommended Operation Conditions
Parameter
Ambient Operating Temperature Power Supply Voltage (measured in respect to GND)
Min.
-40 +3.0
Typ.
+3.3
Max.
+85 +3.6
Units
C V
DC Electrical Characteristics
Unless stated otherwise, VDD = 3.3 V 10%, Ambient Temperature -40 to +85 C
Parameter
Operating Voltage Supply Current Input High Voltage Input Low Voltage Output High Voltage Output High Voltage Output Low Voltage Short Circuit Current Short Circuit Current Input Capacitance Nominal Output Impedance Internal Pull-up Resistor
Symbol
VDD IDD VIH VIL VOH VOH VOL IOS IOS CIN ZOUT RPU
Conditions
No load
Min.
3.0 2
Typ.
3.3 80
Max.
3.6
Units
V mA V
0.8 IOH = -4 mA IOH = -12 mA IOL = 12 mA Clock outputs,15 and 21 Clock outputs 3, 6, 9, 12, 14, and 19 Input FSEL, OE pins 80 70 5 20 200 VDD-0.4 2.4 0.4
V V V V mA mA pF k
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ICS1493A-19 CLOCK GENERATOR FOR AUTOMOTIVE APPLICATION
Parameter
Internal Pull-down Resistor
Symbol
RPd
Conditions
All clock outputs except SSEN pin SSEN pin
Min.
Typ.
200 100
Max.
Units
k k
AC Electrical Characteristics
Unless stated otherwise, VDD = 3.3 V 10%, Ambient Temperature -40 to +85 C
Parameter
Input Frequency Output Rise Time Output Fall Time Output Clock Duty Cycle Output-to-Output Skew Output Enable Time Output Disable Time Power-up Time Spread Modulation Jitter, Cycle-to-cycle Jitter, Cycle-to-cycle Jitter, Peak-to-peak Jitter, Peak-to-peak Output Frequency Synthesis Error Transition Time
Symbol
fIN tOR tOF
Conditions
20% to 80%, CL=12 pF 80% to 20%, CL=12 pF at VDD/2, CL=12 pF at VDD/2, Pin 3, CL=12 pF Pins 14, 15, and 21 only OE going high to output valid OE going low to output Invalid Power on to output valid Spread rate All clocks except reference clock 19.35 MHz Reference clock 19.35 MHz Peak-to-peak, all clocks except reference clock 19.35 MHz Peak-to-peak, reference clock 19.35 MHz All clocks
Min.
Typ.
19.35 1.1 1.1
Max. Units
MHz 1.5 1.5 55 60 175 1 1 20 ns ns % % ps ms ms ms kHz ps ps ps ps 10 ppm ms
45 40
50 50
32 300 500 150 250
tTR
Measured from a change of FSEL until clock stable within 1%
1
Thermal Characteristics
Parameter
Thermal Resistance Junction to Ambient
Symbol
JA JA JA JC
Conditions
Still air 1 m/s air flow 3 m/s air flow
Min.
Typ.
83 75 61 60
Max. Units
C/W C/W C/W C/W
Thermal Resistance Junction to Case
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ICS1493A-19 CLOCK GENERATOR FOR AUTOMOTIVE APPLICATION
Marking Diagram
28 15
1493AGI-19LF ###### YYWW
1
Notes: 1. ###### is the lot number. 2. YYWW is the last two digits of the year and week that the part was assembled. 3. "LF" denotes Pb (lead) free package. 4. Bottom marking: (origin) Origin = country of origin if not USA.
14
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ICS1493A-19 CLOCK GENERATOR FOR AUTOMOTIVE APPLICATION
Package Outline and Package Dimensions (28-pin TSSOP, 4.4mm body)
Package dimensions are kept current with JEDEC Publication No. 95
28
Millimeters Symbol Min Max
Inches* Min Max
INDEX AREA
E1
E
12 D
A A1 A2 b C D E E1 e L aaa
-1.20 0.05 0.15 0.80 1.05 0.19 0.30 0.09 0.20 9.60 9.80 6.40 BASIC 4.30 4.50 0.65 Basic 0.45 0.75 0 8 -0.10
-0.047 0.002 0.006 0.032 0.041 0.007 0.012 0.0035 0.008 0.378 0.386 0.252 BASIC 0.169 0.177 0.0256 Basic 0.018 0.030 0 8 -0.004
A2 A1
A
*For reference only. Controlling dimensions in mm.
c
- Ce
b SEATING PLANE
aaa C
L
Ordering Information
Part / Order Number
ICS1493AGI-19LF ICS1493AGI-19LFT
Marking
see page 7
Shipping Packaging
Tubes Tape and Reel
Package
28-pin TSSOP 28-pin TSSOP
Temperature
-40 to +85 C -40 to +85 C
Parts that are ordered with a "LF" suffix to the part number are the Pb-Free configuration and are RoHS compliant. While the information presented herein has been checked for both accuracy and reliability, IDT assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without additional processing by IDT. IDT reserves the right to change any circuitry or specifications without notice. IDT does not authorize or warrant any IDT product for use in life support devices or critical medical instruments.
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Revision 051310
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